Recently, there has been a growing demand for cheap and flexible tags and labels in which information can be stored, for example as anti-counterfeiting tags in packaging or as identification tags. Production of such a memory device should be cheap and it should be easy to incorporate in the package printing process or the packaging process and should consist of uncomplicated and cheap materials and involve a minimum of processing steps. For use in packages, it is important that the memory device is relatively robust and insensitive to mechanical shock, temperature changes and other environmental influences. In numerous applications, it is important that the information stored in the memory device can be electrically written, read, erased and rewritten.
One type of memory cells that has proven to be rewritable and bistable over prolonged periods of time is based on ferroelectric memory materials. Printing of a memory device on a package or label is only possible at relatively low temperatures in view of the packaging materials used. This excludes the use of inorganic ferroelectric materials and silicon-based driving circuitry which both need temperatures in the range of 300° C. to 400° C., which would result in melting or severe degradation of polymer-based or paper-based substrates suitable of use with packaging materials. Furthermore, the use of high temperature stable polymeric substrates, such as polyimide, is excluded, due to the high cost of the substrate material compared to paper or inexpensive polymeric substrates such as polyethylene (PE) or poly(ethylene terephthalate) (PET).
JP 61-048983A discloses a ferroelectric high polymer thin film and describes how a copolymer of vinylidene fluoride and trifluoroethylene is formed and used as a memory material in a passive memory device.
U.S. Pat. No. 5,060,191 discloses a ferroelectric memory comprising: a ferroelectric thin film having first and second surfaces opposite to each other; a first electrode assembly including a plurality of stripe electrodes arranged in parallel on the first surface side of said ferroelectric thin film; a second electrode assembly including a plurality of stripe electrodes arranged in parallel on the second surface side of said ferroelectric thin film, said stripe electrodes of said second electrode assembly crossing over said stripe electrodes of said first electrode assembly; first and second common electrodes arranged separately from end portions of said respective first and second electrode assemblies and extending in respective directions in which said stripe electrodes of said first and second electrode assemblies are arranged; and selection means for respectively connecting said first and second electrode assemblies to said first and second common electrodes and for selectively activating at least one of said stripe electrodes of each of said first and second electrode assemblies. U.S. Pat. No. 5,060,191 further discloses that a proper solvent can be selectively used for polymer organic material according to the chemical structure and composition ratio thereof, and therefore the film can be formed by effecting the coating-drying process in the spin coating method, dip method, printing method or the like. However, fully printed devices are not disclosed.
U.S. Pat. No. 6,812,509 discloses a memory cell comprising: a) an organic semiconductor having two opposed surfaces; b) two spaced apart electrodes in contact with one surface of the organic semiconductor, wherein the distance there between is a channel length and the portion of the organic semiconductor therebetween is defined as a channel region; c) a ferroelectric polymer having a dielectric constant and two opposed surfaces wherein one surface is in contact with one surface of the organic semiconductor for at least a portion of the channel region; and d) a gate electrode in contact with one surface of the ferroelectric polymer for at least a portion of the channel region; and e) an organic dielectric interposed between the ferroelectric polymer and the organic semiconductor. U.S. Pat. No. 6,812,509 further discloses a memory cell comprising: a) a substrate having a surface; b) an organic semiconductor having first and second surfaces wherein the first surface is adjacent to the surface of the substrate; c) two spaced apart electrodes in contact with one surface of the organic semiconductor, wherein the distance there between is a channel length and the portion of the organic semiconductor therebetween is defined as a channel region; d) an organic dielectric having first and second surfaces wherein the first surface is in contact with the second surface of the organic semiconductor; e) a ferroelectric polymer having a dielectric constant and two opposed surfaces wherein one surface is in contact with second surface of the organic dielectric for at least a portion of the channel region; and f) a gate electrode in contact with one surface of the ferroelectric polymer for at least a portion of the channel region. U.S. Pat. No. 6,812,509 also discloses that these organic thin film semiconductors can be made by well known processes such as vacuum evaporation, electrochemical polymerization, solution spin coating, screen printing, ink jet printing, and Langmuir-Blodgett growth. These organic field effect transistors use a ferroelectric thin film polymer as gate dielectric. Such devices have the disadvantage of having relatively complex structures with stringent requirements in respect of layer thickness and electrode spacing.
U.S. Pat. No. 6,686,211 discloses a method for forming a non-volatile memory device, comprising: forming first electrodes separated from one another by barrier members; depositing an organic thin film solution on the first electrodes and solidifying at least a portion of the organic thin film solution to form a thin film, wherein the thin film is capable of a polarization inversion by exposure to an electric field; wherein the barrier members are formed to include a first insulating layer and a second layer that repels the organic thin film solution; and forming a second electrode on the thin film on the first electrodes. U.S. Pat. No. 6,686,211 further discloses a method for manufacturing a semiconductor device having a ferroelectric capacitor that is provided between a lower electrode and an upper electrode, the method for manufacturing a semiconductor device comprising the steps of: providing a semiconductor substrate including a transistor, forming an insulation layer overlying the transistor, forming a lower electrode over the insulation layer, wherein the lower electrode is in electrical contact with a part of the transistor, forming partitioning members over the insulation layer, the partitioning members adapted to separate the lower electrode from other lower electrodes, and depositing a solution for forming an organic layer over the lower electrode that is partitioned from other lower electrodes by the partitioning members, wherein the organic layer is not deposited directly above the partitioning members, and thereafter solidifying the same to form the organic layer. U.S. Pat. No. 6,686,211 also discloses that the organic thin film can be coated and patterned by an ink jet type recording head and that a variety of other printing methods can be used to coat the organic thin film material solution such as spin-coating, spray-coating and the like. However, fully printed devices are not disclosed.
WO 02/043071A1 discloses a ferroelectric memory circuit (C) comprising a ferroelectric memory cell in the form of a ferroelectric polymer thin film (F) and first and second electrodes (E1; E2) respectively, contacting the ferroelectric memory cell (F) at opposite surfaces thereof, whereby a polarization state of the cell can be set, switched or detected by applying appropriate voltages to the electrodes (E1; E2), characterized in that at least one of the electrodes (E1; E2) comprises at least one contact layer (P1; P2), said at least one contact layer (P1; P2) comprising a conducting polymer contacting the memory cell (C), and optionally a second layer (M1; M2) of a metal film contacting the conducting polymer (P1; P2), whereby said at least one of the electrodes (E1; E2) either comprises a conducting polymer contact layer (P1; P2) only, or a combination of a conducting polymer contact layer (P1; P2) and a metal film layer (M1; M2). WO 02/043071A1 further discloses that in thin films, a stiff metal substrate on which the film is normally deposited by spin-coating, may inhibit the crystallization process due to the heterogeneous nucleation process which determines the crystallite orientation being influenced by the substrate and that it is preferable to deposit the conducting polymer thin film by means of spin coating, and similarly depositing the ferroelectric polymer thin film on the first contact layer by means of spin coating. The all-polymer ferroelectric memory devices exemplified are prepared by spincoating and evaporation techniques.
US 2004/0131862A1 discloses a process of forming a ferroelectric polymer film comprising: disposing a solution comprising a ferroelectric polymer film precursor composition and a solvent composition onto a substrate, wherein the solvent composition has a Δv value of greater than or equal to 8.5, wherein Δv=(δd2+δp2)1/2, δd being a Hansen dispersive solubility parameter and δp being a Hansen polar solubility parameter; and removing at least a portion of the solvent to produce a ferroelectric polymer film. Furthermore US 2004/0131862A1 specifically claims the ferroelectric copolymer with 50 to 90 mol % of vinylidene fluoride and 10 to 50 mol % of trifluoroethylene and specifically exemplifies the use of PGMEA, propylene glycol methyl ether acetate and ethyl lactate and discloses formamide, ethylene carbonate, dipropylene glycol, gamma-butyrolactone, dimethyl sulfoxide, acetonitrile, n-butyl benzyl phthalate, diethylene glycol, dimethyl phthalate, acetophenone, methoxypropyl acetamide, N,N-dimethylacetamide, ethylene glycol, ethyl cinnamate, diethyl phthalate, N-methylmorpholine, benzonitrile, ethylene glycol 2-ethylhexyl ether, benzyl alcohol, morpholine, ethylene glycol diacetate, propylene glycol, 1,4-dioxane, furfuryl alcohol, cyclohexanone, propylene glycol butyl ether, ethylene glycol monoethyl ether, diethylene glycol ethyl ether, ethylene glycol ethyl ether, ethyl-3-ethoxypropionate, ethylene glycol methyl ether, propyleneglycol methyl ether, N-ethylmorpholine, methyl n-propyl ketone, mesitylene, diethylene glycol ethyl ether acetate, diethyleneglycol methyl ether, cyclohexanol, 4-methyl-3-penten-2-one, 2-methyl-2,4-pentanediol, ethyl benzene, 1-decanol, 1-isopropyl-2-methylimidazole, ethyl lactate, 2-hexyl acetate, diethylene glycol butyl ether acetate, diethylketone, 1-methoxy-2-butanol, diethylene glycol butyl ether, or a combination comprising at least one of the foregoing solvents as preferred solvents.
Conductive inks can be either organic- or metal-based. Metal-based conductive inks are mainly based on dispersions of silver or copper particles (see e.g. WO 00/29208), or precursor materials thereof (see e.g. US 2003/0124259A).
Water-based and solvent-based inks for printing conductive (electrode) patterns of intrinsically conductive polymers on flexible substrates are disclosed, for example, in WO 99/34371, WO 02/00759A, WO 02/079316A, WO 02/080627A, WO 03/000765, WO 03/048228A and WO 03/048229A and screen printing inks are commercially available e.g. Orgacon® EL-P3040 from AGFA-GEVAERT N.V. WO 03/000765A and EP 1 415 826A disclose flexographic and offset printing techniques respectively with inks containing intrinsically conductive polymers. The inkjet printing of PEDOT:PSS dispersions is described for example in Nature Mat. 2004, vol. 3, 171-176, and in Adv. Mater. 2004, vol. 16 (3), 203-213. However, there is a considerable technological difference between the printing of individual layers of a memory device using a conventional printing technique and the production of a fully printed memory device in which all the functional layers necessary for the operation of the memory device are printed by a conventional printing technique.